1. Field of the Invention
The present invention relates to a semiconductor integrated circuit with a sense amplifier control circuit for controlling the operation of a sense amplifier (or a charge supplying circuit) incorporated in a semiconductor integrated circuit such as a semiconductor integrated memory device, in particular, to a sense amplifier control circuit in a semiconductor integrated circuit capable of preventing a lowering of the operating margin caused in a charge operation of a sense amplifier when different external source voltage is used.
2. Description of the Prior Art
Conventionally, it is difficult to keep the same source charging characteristics suitable for both low voltage operations (for example, V.sub.CC =3.3 V) and high voltage operations (for example, V.sub.CC =5.0 V) in a same integrated circuit for a sense amplifier (or a P-channel sense amplifier) consisting of a P-channel MOS transistor.
When a high voltage is used as the source voltage, the driving ability of the transistor is increased, therefore the driving ability of a drive circuit for driving a P-channel sense amplifier is also increased so that the P-channel sense amplifier is charged at a high speed rate. In such a case, a particular problem is a charging noise which occurs when the P-channel sense amplifier is charged. An extremely large charging noise produces serious problems, such as causing errors in the circuit operation.
In addition, because of the recent trend to an increasing number of bits in highly integrated circuits, as exemplified in dynamic RAMs, the number of sense amplifiers driven at one time is increased, and the effect of more and more charging noise becomes serious.
When a low voltage is used as the source voltage, the drive ability of the transistor is decreased, and the rate of charging the P-channel sense amplifier becomes slow. In a dynamic RAM, the problem is produced that when the cycle timing is delayed, the timing for restoring cell data is also delayed. Accordingly, it is preferable that the driving ability of a sense amplifier control circuit 21 (or a sense amplifier control means) for driving a P-channel sense amplifier (a charge supplying circuit) be increased on the use of the low source voltage as compared with the use of the high source voltage. However, it is difficult to obtain such characteristics with conventional semiconductor integrated circuits.
FIG. 1 shows a circuit diagram of a standard voltage generation circuit 10 or a standard voltage generator 10 as a charging circuit, whose outputs is provided to a driving circuit or a driver 20 shown in FIG. 2 for a conventional P-channel type sense amplifier 40 (a charge supplying circuit) shown in FIG. 3 in a conventional semiconductor integrated circuit.
In this section, the circuit which consists of the standard voltage generating circuit 10 and the drive circuit 20 is called a sense amplifier control circuit 21 for the sense amplifier 40.
In FIG. 1, the standard voltage generating circuit 10 has a configuration in which a resistance R20 of which one end is connected to a source voltage V.sub.CC, a resistance R21 connected in series with the resistance R20, and a diode D21 of which the anode is connected to the resistance R21, and the cathode of the diode 21 is connected to a ground potential V.sub.SS. The standard voltage V.sub.B supplied from the standard voltage generation circuit 10 is provided at an intermediate node between the resistance R20 and the resistance R21.
As shown in FIG. 2, the standard voltage V.sub.B generated by the standard voltage generating circuit 10 is supplied to the drive circuit 20 (or the driver) for a P channel type sense amplifier 40 shown in FIG. 3.
In the drive circuit 20 shown in FIG. 2, when an activation signal .phi.S for a P-channel sense amplifier 40 is at the L level, an N-channel transistor N30 is in the cut-off state and a P-channel transistor P30 is in the ON state. Accordingly, the gate voltage of P-channel transistors P31 and P32 is V.sub.CC and the transistors P31 and P32 are cut off so that no charge is supplied to a sense amplifier drive signal .phi.P (floating state) as the output of the driving circuit 20.
Next, when the activation signal .phi.S is switched from the L level to the high level, the P-channel transistor P30 is cut off and the N-channel transistor N30 is turned ON. Here, the voltage potential of a node A can be controlled based on changing the conductance of a transistor N31 by regulating the value of the gate voltage V.sub.B of the N-channel transistor N31.
In this manner, the voltage potential of the node A in the drive circuit 20 is controlled by adjusting the standard voltage V.sub.B. As a result, the charging ability of the P-channel sense amplifier 40 is varied by changing the conductance of the transistor P32 for driving the P-channel sense amplifier 40. For example, when the standard voltage V.sub.B is increased, the potential of the node A in the drive circuit 20 is decreased, and the conductance of the transistor P32 for driving the P-channel sense amplifier 40 is increased. Specifically, the charging ability is increased.
FIG. 3 shows the circuit diagram for the P-channel sense amplifier 40. The sense amplifier drive signal .phi.P is provided to the source of P-channel transistors P33 and P34.
FIG. 4 is a diagram showing the changes in the standard voltage V.sub.B with respect to the source voltage V.sub.CC for the sense amplifier control circuit 21 consisting of the standard voltage generating circuit 10 and the drive circuit 20. When the source voltage V.sub.CC rises, the standard voltage V.sub.B has the same level as the source voltage V.sub.CC until V.sub.B reaches the threshold voltage of the diode D21. When the standard voltage V.sub.B is exceed to the threshold voltage of the diode D21, following the source voltage, the standard voltage V.sub.B rises in proportion to the ratio of the resistances R20 and R21.
In this example of a conventional circuit, the charging velocity is retarded on the low source voltage side and is higher on the high source voltage side because the standard voltage V.sub.B rises in proportion to the source voltage V.sub.CC. For this reason, the delay in the cycle timing and the like is large on the low voltage side and the operating margin drops on the high voltage side because this acts to increase the charging noise.
Accordingly, it is difficult to obtain charging characteristics for the P-channel sense amplifier 40 suitable for both low voltage periods and high voltage periods in the same integrated circuit using the standard voltage generating circuit 10 shown in FIG. 1 with these characteristics.
Specifically, the low voltage side of the standard voltage V.sub.B rises following the source voltage V.sub.CC (almost the same voltage potential), but it is desired to obtain the type of characteristics where the level of the standard voltage V.sub.B gradually drops when reaching the desired source voltage.
As outlined above, it is difficult to obtain the charging characteristics of a suitable sense amplifier when a low source voltage is used or a high source voltage is used in a same semiconductor integrated circuit because the standard voltage used for driving the sense amplifier rises, acting in the direction in which the operating margin drops, in proportion to the source voltage.